The combination of NAND gates shown in the fi | vedclass

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(A) For the first circuit:The inputs $A$ and $B$ are passed through two $NAND$ gates configured as $NOT$ gates,resulting in $\bar{A}$ and $\bar{B}$.Th

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An $OR$ gate and an $AND$ gate respectively

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(A) For the first circuit:The inputs $A$ and $B$ are passed through two $NAND$ gates configured as $NOT$ gates,resulting in $\bar{A}$ and $\bar{B}$.These are then fed into a third $NAND$ gate.The output $C = \overline{\bar{A} \cdot \bar{B}} = \overline{\bar{A}} + \overline{\bar{B}} = A + B$ (using De Morgan's theorem).Thus,the first circuit is equivalent to an $OR$ gate.For the second circuit:The inputs $A$ and $B$ are fed into a $NAND$ gate,giving $\overline{AB}$.This output is then fed into a $NAND$ gate configured as a $NOT$ gate.The output $C = \overline{\overline{AB}} = AB$.Thus,the second circuit is equivalent to an $AND$ gate.Therefore,the combinations are equivalent to an $OR$ gate and an $AND$ gate respectively.

The combination of $NAND$ gates shown in the figure is equivalent to:

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