Consider a p-n junction as a capacitor, forme | vedclass

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(A) In an $n-p-n$ transistor working in $CE$ configuration, the base-emitter junction is forward-biased, while the collector-emitter junction is rever

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$C_1 > C_2$

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(A) In an $n-p-n$ transistor working in $CE$ configuration, the base-emitter junction is forward-biased, while the collector-emitter junction is reverse-biased.The capacitance of a junction is given by $C = \frac{\epsilon A}{d}$, where $d$ is the width of the depletion layer.For a forward-biased junction (base-emitter), the depletion layer width $d_1$ is very small.For a reverse-biased junction (collector-emitter), the depletion layer width $d_2$ is significantly larger.Since $C \propto \frac{1}{d}$, a smaller depletion width results in a larger capacitance.Therefore, $d_1  C_2$.

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