The truth table for the system of four NAND g | vedclass

Name: Exam Paper Generator | JEE NEET Paper Generator | Vedclass
Brand: Vedclass
Rating: 5 (35 reviews)

Question

(B) Let the output of the first $NAND$ gate be $Y_1 = \overline{A \cdot B}$.This $Y_1$ is fed into the next two $NAND$ gates.The output of the second

Vedclass · Accepted Answer

$A$$B$$Y$$0$$0$$0$$0$$1$$1$$1$$0$$1$$1$$1$$0$

Vedclass · Answer

(B) Let the output of the first $NAND$ gate be $Y_1 = \overline{A \cdot B}$.This $Y_1$ is fed into the next two $NAND$ gates.The output of the second $NAND$ gate is $Y_2 = \overline{A \cdot Y_1} = \overline{A \cdot (\overline{A \cdot B})} = \overline{A} + (A \cdot B) = \overline{A} + B$.The output of the third $NAND$ gate is $Y_3 = \overline{B \cdot Y_1} = \overline{B \cdot (\overline{A \cdot B})} = \overline{B} + (A \cdot B) = \overline{B} + A$.The final output $Y$ is the $NAND$ of $Y_2$ and $Y_3$:$Y = \overline{Y_2 \cdot Y_3} = \overline{(\overline{A} + B) \cdot (\overline{B} + A)} = \overline{(\overline{A} \cdot \overline{B} + \overline{A} \cdot A + B \cdot \overline{B} + B \cdot A)} = \overline{(\overline{A} \cdot \overline{B} + 0 + 0 + A \cdot B)} = \overline{\overline{A} \cdot \overline{B}} + \overline{A \cdot B} = (A + B) \cdot (\overline{A} + \overline{B}) = A \cdot \overline{B} + B \cdot \overline{A}$.This is the Boolean expression for an $XOR$ gate.The truth table for an $XOR$ gate is:If $A=0, B=0$, then $Y=0$.If $A=0, B=1$, then $Y=1$.If $A=1, B=0$, then $Y=1$.If $A=1, B=1$, then $Y=0$.This matches option $B$.

The truth table for the system of four $NAND$ gates as shown in the figure is:

Similar Questions

How would you set up a circuit to obtain a $NOT$ gate using a transistor?

In the circuit shown, inputs $A$ and $B$ are in states $1$ and $0$ respectively. What is the only possible stable state of the outputs $X$ and $Y$?

The logic gate represented by the following logic circuit is

Digital signals are characterized by which of the following statements?
$(i)$ They do not provide continuous values.
$(ii)$ They represent values in discrete steps.
$(iii)$ They can be represented by a binary system.
$(iv)$ They represent both binary and decimal systems.

Which of the following represents the $NAND$ gate?

Vedclass Test Series

Exam Paper Generator

Online Exam Module