The two combinations of NAND gates shown in t | vedclass

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(A) For circuit $(i)$: The two $NAND$ gates with shorted inputs act as $NOT$ gates. The inputs to the final $NAND$ gate are $\bar{A}$ and $\bar{B}$.Th

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$(i)$-$OR$ gate,(ii)-$AND$ gate

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(A) For circuit $(i)$: The two $NAND$ gates with shorted inputs act as $NOT$ gates. The inputs to the final $NAND$ gate are $\bar{A}$ and $\bar{B}$.The output $C = \overline{\bar{A} \cdot \bar{B}} = \overline{\bar{A}} + \overline{\bar{B}} = A + B$. This is the Boolean expression for an $OR$ gate.For circuit (ii): The first $NAND$ gate produces $\overline{AB}$. The second $NAND$ gate with shorted inputs acts as a $NOT$ gate,inverting the signal.The output $C = \overline{\overline{AB}} = AB$. This is the Boolean expression for an $AND$ gate.

The two combinations of $NAND$ gates shown in the figures are equivalent to:

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